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Add circuit_delay.png

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This commit is contained in:
Stefan Bühler 2010-06-18 22:46:49 +02:00
parent a86cfa9660
commit 09e41db6b1
2 changed files with 3 additions and 2 deletions
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5
Circuit.hs
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@ -33,11 +33,14 @@ key_circuit_str = "19L:12R13R0#1R12R,14R0L0#4R9L,9R10R0#3L8L,2L17R0#5L9R,15R1L0#
-- goal: Find a circuit with test_key_circ circ == True -- goal: Find a circuit with test_key_circ circ == True
test_key_circ :: Circuit -> Bool test_key_circ :: Circuit -> Bool
test_key_circ circ = (key == execcirc circ) test_key_circ circ = (key == execcirc circ)
-- key: 11021210112101221
factory0 = parseCircuit "0L:X0R0#X0R:0L" factory0 = parseCircuit "0L:X0R0#X0R:0L"
fact0_output = readstream "02120112100002120" fact0_output = readstream "02120112100002120"
test0 = fact0_output == execcirc factory0 test0 = fact0_output == execcirc factory0
-- known server input stream (from factory "X::X")
input = readstream "01202101210201202"
data Circuit = Circuit { outPin :: Int, inPins :: [Int] } deriving (Eq) data Circuit = Circuit { outPin :: Int, inPins :: [Int] } deriving (Eq)
@ -123,7 +126,5 @@ execcirc circ = execfactory (circfactory circ) input
readstream :: String -> [Int] readstream :: String -> [Int]
readstream = map (\c -> read [c] :: Int) readstream = map (\c -> read [c] :: Int)
input = readstream "01202101210201202"
key_input = [0,2,2,2,2,2,2,0,2,1,0,1,1,0,0,1,1] key_input = [0,2,2,2,2,2,2,0,2,1,0,1,1,0,0,1,1]
key = execfactory (circfactory key_circuit) key_input key = execfactory (circfactory key_circuit) key_input

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