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intcode: decode opcode into proper structure/enums

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This commit is contained in:
Stefan Bühler 2019-12-07 13:57:46 +01:00
parent f7d70ba76e
commit 19b70128d3
3 changed files with 237 additions and 48 deletions
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118
Cargo.lock generated
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1
shared/Cargo.toml
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@ -7,3 +7,4 @@ edition = "2018"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[dependencies] [dependencies]
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166
shared/src/intcode.rs
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@ -1,15 +1,80 @@
const OP_ADD: CELL = 1; use failure::Error;
const OP_MUL: CELL = 2;
const OP_INPUT: CELL = 3; #[repr(u8)]
const OP_OUTPUT: CELL = 4; #[derive(PartialEq, Eq, PartialOrd, Ord, Hash, Clone, Copy, Debug)]
const OP_JUMP_IF_TRUE: CELL = 5; pub enum ParameterMode {
const OP_JUMP_IF_FALSE: CELL = 6; Position = 0,
const OP_LESS_THAN: CELL = 7; Immediate = 1,
const OP_EQUAL: CELL = 8; }
const OP_HALT: CELL = 99;
impl ParameterMode {
pub fn decode(code: CELL) -> Result<(Self, CELL), Error> {
let rem = code / 10;
let mode = match code % 10 {
0 => Self::Position,
1 => Self::Immediate,
m => failure::bail!("Unknown parameter mode: {}", m),
};
Ok((mode, rem))
}
}
#[repr(u8)]
#[derive(PartialEq, Eq, PartialOrd, Ord, Hash, Clone, Copy, Debug)]
pub enum Instruction {
Add = 1,
Mul = 2,
In = 3,
Out = 4,
JumpIfTrue = 5,
JumpIfFalse = 6,
LessThan = 7,
Equal = 8,
Halt = 99,
}
impl Instruction {
pub fn decode(opcode: CELL) -> Result<(Self, CELL), Error> {
let rem = opcode / 100;
let instr = match opcode % 100 {
1 => Self::Add,
2 => Self::Mul,
3 => Self::In,
4 => Self::Out,
5 => Self::JumpIfTrue,
6 => Self::JumpIfFalse,
7 => Self::LessThan,
8 => Self::Equal,
99 => Self::Halt,
n => failure::bail!("Unknown instruction code {}", n),
};
Ok((instr, rem))
}
}
#[derive(PartialEq, Eq, PartialOrd, Ord, Hash, Clone, Copy, Debug)]
pub struct OpCode {
pub instruction: Instruction,
pub modes: [ParameterMode; 3],
}
impl OpCode {
pub fn decode(opcode: CELL) -> Result<OpCode, Error> {
let (instruction, code) = Instruction::decode(opcode)?;
let (mode0, code) = ParameterMode::decode(code)?;
let (mode1, code) = ParameterMode::decode(code)?;
let (mode2, code) = ParameterMode::decode(code)?;
failure::ensure!(code == 0);
let modes = [mode0, mode1, mode2];
Ok(OpCode {
instruction,
modes,
})
}
}
pub type CELL = i64; pub type CELL = i64;
type Mode = u8;
#[derive(PartialEq, Eq, Clone, Debug)] #[derive(PartialEq, Eq, Clone, Debug)]
pub enum SimulateStep { pub enum SimulateStep {
@ -39,97 +104,102 @@ impl SimulateStep {
#[derive(PartialEq, Eq, Clone, Debug)] #[derive(PartialEq, Eq, Clone, Debug)]
pub struct IntCode { pub struct IntCode {
/// instruction pointer
pub ip: usize, pub ip: usize,
/// next value to use for an "IN" (3) instruction (which will clear it)
pub next_input: Option<CELL>, pub next_input: Option<CELL>,
/// memory of machine (both code and data)
pub data: Vec<CELL>, pub data: Vec<CELL>,
} }
impl IntCode { impl IntCode {
#[inline(always)] #[inline(always)]
fn fetch(&mut self, mode: Mode) -> CELL { fn fetch(&mut self, modes: &mut &[ParameterMode]) -> CELL {
let mode = modes[0];
*modes = &modes[1..];
let imm = self.data[self.ip]; let imm = self.data[self.ip];
self.ip += 1; self.ip += 1;
match mode { match mode {
1 => imm, ParameterMode::Position => self.data[imm as usize],
_ => self.data[imm as usize], ParameterMode::Immediate => imm,
} }
} }
#[inline(always)] #[inline(always)]
fn store(&mut self, mode: Mode, value: CELL) { fn store(&mut self, modes: &mut &[ParameterMode], value: CELL) {
let mode = modes[0];
*modes = &modes[1..];
let addr = self.ip; let addr = self.ip;
self.ip += 1; self.ip += 1;
match mode { match mode {
1 => self.data[addr] = value, ParameterMode::Immediate => self.data[addr] = value,
_ => { ParameterMode::Position => {
let addr = self.data[addr] as usize; let addr = self.data[addr] as usize;
self.data[addr] = value; self.data[addr] = value;
}, },
} }
} }
fn binop<F>(&mut self, op: F, modes: [Mode; 3]) fn binop<F>(&mut self, op: F, modes: &mut &[ParameterMode])
where where
F: FnOnce(CELL, CELL) -> CELL, F: FnOnce(CELL, CELL) -> CELL,
{ {
let src1 = self.fetch(modes[0]); let src1 = self.fetch(modes);
let src2 = self.fetch(modes[1]); let src2 = self.fetch(modes);
self.store(modes[2], op(src1, src2)); self.store(modes, op(src1, src2));
} }
/// run simple machine without I/O to completion
pub fn simulate(&mut self) { pub fn simulate(&mut self) {
assert_eq!(self.ip, 0); assert_eq!(self.ip, 0);
assert!(self.next_input.is_none()); assert!(self.next_input.is_none());
self.simulate_step().expect_finished(); self.simulate_step().expect_finished();
} }
/// run a machine until:
/// - it needs input, but `next_input` is `None`
/// - it outputs a value
/// - it finishes
pub fn simulate_step(&mut self) -> SimulateStep { pub fn simulate_step(&mut self) -> SimulateStep {
loop { loop {
let modes = self.data[self.ip]; let opcode = OpCode::decode(self.data[self.ip]).unwrap();
let modes = &mut &opcode.modes[..];
self.ip += 1; self.ip += 1;
let op = modes % 100;
let modes = modes / 100;
let mode1 = (modes % 10) as Mode;
let modes = modes / 10;
let mode2 = (modes % 10) as Mode;
let modes = modes / 10;
let mode3 = (modes % 10) as Mode;
let modes = [mode1, mode2, mode3];
match op { match opcode.instruction {
OP_ADD => self.binop(|a, b| a + b, modes), Instruction::Add => self.binop(|a, b| a + b, modes),
OP_MUL => self.binop(|a, b| a * b, modes), Instruction::Mul => self.binop(|a, b| a * b, modes),
OP_LESS_THAN => self.binop(|a, b| if a < b { 1 } else { 0 }, modes), Instruction::LessThan => self.binop(|a, b| if a < b { 1 } else { 0 }, modes),
OP_EQUAL => self.binop(|a, b| if a == b { 1 } else { 0 }, modes), Instruction::Equal => self.binop(|a, b| if a == b { 1 } else { 0 }, modes),
OP_INPUT => { Instruction::In => {
if let Some(v) = self.next_input.take() { if let Some(v) = self.next_input.take() {
self.store(mode1, v); self.store(modes, v);
} else { } else {
self.ip -= 1; // go back to opcode self.ip -= 1; // go back to opcode
return SimulateStep::WaitForInput; return SimulateStep::WaitForInput;
} }
}, },
OP_OUTPUT => { Instruction::Out => {
return SimulateStep::Output(self.fetch(mode1)); return SimulateStep::Output(self.fetch(modes));
}, },
OP_HALT => { Instruction::Halt => {
self.ip -= 1; // make re-running this step end up here again self.ip -= 1; // make re-running this step end up here again
return SimulateStep::Finished; return SimulateStep::Finished;
}, },
OP_JUMP_IF_TRUE => { Instruction::JumpIfTrue => {
if self.fetch(mode1) != 0 { if self.fetch(modes) != 0 {
self.ip = self.fetch(mode2) as usize; self.ip = self.fetch(modes) as usize;
} else { } else {
self.ip += 1; // skip target self.ip += 1; // skip parameter for target
} }
}, },
OP_JUMP_IF_FALSE => { Instruction::JumpIfFalse => {
if self.fetch(mode1) == 0 { if self.fetch(modes) == 0 {
self.ip = self.fetch(mode2) as usize; self.ip = self.fetch(modes) as usize;
} else { } else {
self.ip += 1; // skip target self.ip += 1; // skip parameter for target
} }
}, },
_ => panic!("invalid opcode: {}", op),
} }
} }
} }